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Title of the paper: A Primer on Hardware Security: Models, Methods, and Metrics Available at: https://ieeexplore.ieee.org/abstract/document/6860363 |
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Procuring intellectual property (IP) designs from thirdparty design houses, designing some components inhouse, combining both, and generating the IC layout.
A blueprint of the design (e.g., in terms of GDS-II layout format) is then sent to the foundry that develops a costly mask and manufactures the ICs.
The ICs are then tested at the manufacturing site and often also at third-party test facilities.
Finally, fault-free ICs are packaged and sold.
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Side-channel attacks exploit the leakage of secret information through a physical modality when an application is being executed on a system.
Side-channel attacks are powerful and have been able to break most existing important cryptographic algorithms
Timing consumption, power consumption, electromagnetic (EM) emanations, photonic emissions, and acoustic noise of the system can be used to extract the secret key.
Fault attacks can be launched using lasers, glitches in power supplies and clocks, and X-rays.
An attacker can scan out the secret key, when the key storing registers are connected as a scan chain. It has been shown that the power/timing consumption of PUF circuits is directly correlated with the process variation that PUF secrets are based upon. Therefore, PUFs are also shown to be susceptible to side-channel attacks.
Threat Models
A realistic threat model must be developed first, and the defense should then vary depending upon the
capabilities of the attacker in collecting the side-channel measurements.
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Leakage Reduction: These techniques decrease the dependency between the side-channel traces of IF and the secret information k.
Noise Injection: The SNR of the measurable sidechannel information can be reduced by injecting artificial noise. Therefore, noise injection does not provide a theoretical security but it does increase the required work of an attacker to extract the secret keys.
Key Update: Frequently updating the secret key prevents the accumulation of side-channel information by the adversary. This method uses a predefined sequence of keys (e.g., the output of a pseudorandom
number generator) plus synchronized timings to ensure that the sequence of keys is consistent for both communicating parties.Side-Channel-Resistant PUFs: Due to effectiveness of side-channel attacks against PUFs, it is imperative that circuit countermeasures be used in future implementations. These countermeasures mitigate
the correlation between the secret information and the measurable circuit delay/power consumption.Secure Scan Chains: In a secure scan approach, mirror key registers are used in sensitive parts of the circuits. These registers block unauthorized access to value of sensitive registers in the test mode of operation. In another approach, scan chains are divided into smaller subchains and access to them for regular users is randomized.
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