Hong-Kong paper bonanza
4 lead by Portland
papers papers papers
3 lead by Paris
SWARM2 associate team approved
Having intermittent UART clock drift issues; may be power supply related?
WIP paper with bringing up last year’s tapeout class chip
Next year, current DAC for LO will be included
Injection locking from the divider is a likely issue. Can they adjust power supplies or add f_LO (4.8 GHz) to the LO’s power source to counter?