08-Apr-2026

08-Apr-2026

Attendees

  1. @David Burnett

  2. @Fil Maksimovic

  3. Yiming Yuan

  4. @Alfonso Cortés

  5. @Titan Yuan

  6. @Tengfei Chang

Notes

  • @David Burnett

    • Proposing EWSN workshop

    • npj deadline extended to July 04

    • VU ugrad recruiting open and going well – AI assisted BER maximization

    • wafer.space first run is finished; planning to book space on second run

  • @Fil Maksimovic

    • CEA has a cool TSV technique

    • Interviewing visitors for 3 months

  • @Tengfei Chang

  • @Titan Yuan

    • EWSN paper accepted; multichannel frequency calibration

    • Radar stuff otherwise

  • @Alfonso Cortés

    • RISC-V tapeout w chipyard in IHP130! Aimed for the smallest possible system using chipyard; default includes 32 bit cores as examples but the system is still 64 bit. Had to manually modify busses to make them 32. Had to keep L1/L2 caches because they’re expected by memory manager. Made memory appear on chip. Lots of pins that make testing difficult! Serial tilelink accelerates firmware loading vs JTAG. Includes SRAM PUF secret generator similar to Sara’s work.

    • LibreLane used to synthesize; difficult because LibreLane and PDK both being updated until the last minute.

    • Alternatives to consider in the future: Open Hardware Foundation and LowRISC cores

  • Yiming Yuan

    • npj article in preparation