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Attendees

  1. David Burnett

Logistics

Back on normal schedule: Thursdays 09:10 US PDT, 09:00 Berkeley, 18:10 PM CEST

Notes

  • David Burnett

    • Pursuing three options for upcoming tapeout deadline:

      • Push SCuMV23 design (Chipyard 1.9.0) through on RHEL7 system w/ debugging help from Daniel Lovell

      • Elaborate the latest basic design (Chipyard 1.13) through an RHEL9/Rocky 9 system, then move elaborated systemverilog to RHEL7 system and continue with either:

        • Hammer, or

        • Manually working through Genus and Innovus

      • Install PDK on RHEL9/Rocky 9 system and go through full flow with latest (Chipyard 1.13)

        • Pending IT setup of system

    • Tapeout deadline is a priority, but the larger priority is establishing a flow that will work for us on future SoC designs. After tapeout deadline, we will investigate alternatives like siliconcompiler and Cadence Stylus

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