alheyasat19weak

Abstract

The deployment of IoT platforms for SmartCity applications is demanding solutions to assure security and integrity levels. In this context, physical unclonable functions (PUF) may overcome the security drawbacks of storing the security key in a non-volatile memory. The existence of SRAM in embedded systems has driven the implementation of PUF solutions using memory circuit as entropy sources. The use of a non-specific memory design requires the need of identify the adequate cells useful for PUF applications. This work proposes a new methodology to distinguish the adequate cells based on mismatch factor calculation. The mismatch analysis using physical and performance parameters shows the viability of the selection methodology and computes the robustness of the responses in terms of probability of error in the start-up value.

SRAM PUF Reliability

Open

The design of a SRAM cell useful for memory operation tries to improve the cell symmetry to reduce the probability of errors during read and write operations.

• for read operation the designer defines the pull-down NMOS transistors width wider than the access NMOS transistors width. Therefore, the cell ratio (CR) is usually designed to be slightly bigger than 1 and equal for both cell inverters.

• In a write operation, the designer must define a narrower pull-up PMOS transistors width than the access NMOS transistors width. Therefore, the pull-up ratio (PR) is usually designed to be slightly smaller than 1 and equal for both cell inverters.

Due to parameter variation, during fabrication processes, CR and PR are not equal for both cell inverters. As a result, memory cells become slightly asymmetric, and their start-up values will become statistically different.

• strong cells are defined as those memory cells that present higher asymmetry between inverters producing the same start-up state with high probability,

• weak cells are defined as those memory cells that are more symmetric and present both stable states with similar probability.

Weak cells are more suitable for memory operation, but their start-up value introduces high entropy in the PUF response and has a great dependency on external issues (temperature, power supply noise, electromagnetic noise, …).

There are two main alternatives to implement a PUF using a SRAM as entropy generator circuit:

1. design a specific SRAM instance that will be used only as a PUF circuit

2. implement a PUF using a non-specific SRAM designed for memory operation.

In general, both alternatives use the memory as a source of initial start-up values that have to be selected to include only the strong cells as a PUF response. Following, this response is corrected using Error Correction Codes and a fuzzy extractor to provide the secure key.

Methodology to identify cells

The use of non-specific SRAM instances in a PUF circuit may lead to the need to identify which memory cells have the highest reliability (strong cells) and which ones are the weak cells that introduce entropy in the response output.

In order to estimate this misalliance between transistor pairs, a new Mismatch Factor (MF) is defined as the subtraction of attributes from both (MPQ, MNQB) and (MPQB, MNQ) pairs.

Open

The discontinued line, equivalent to MF = 0, divides the mismatch space in two planes: the plane where (DP, DN) pairs results in MF > 0, then start-up value is “0”, and the plane where MF < 0 and start-up value will be “1”.

The (DP, DN) pairs near the discontinued line will be the identified as weak cells, while the (DP, DN) pairs far away from the line will be identified as strong cells.

Identifying the weak and strong cells

The transistor feature selection related to the set of physical or electrical parameters defines the MF space. This work considers two different parameters:

1. threshold voltage of each transistors because it is impacted by process variation and aging,

2. quiescent drain current of each transistor which is dependent on the value stored in the memory cell.

The identification methodology has been applied using a memory cell designed with minimal dimensions in commercial CMOS 65nm technology.

The montecarlo simulation introduces the process and mismatch statistical behavior to obtain a realistic distribution of weak and strong bit-cells.

The histogram of MF values shows that the greatest number of cells are near the division line (MF = 0), therefore they must be classified as weak cells, see Figure 6. This is consistent with the design of the memory cell, because the memory cell was not specifically implemented for PUF applications.

The MF values where the probability of error is zero may define the limits between weak and strong cells.

Considering differences between parameters, the weak cells range when MF considers V_th includes 29.7% of the total cells while, the weak cells range when MF considers I_D includes 40.95% of the total cells. The reason
for this difference will be explored in future work.