• @Jackson Paddock

  • @David Burnett

  • @Kristofer PISTER

  • @Tengfei Chang


  • @Jackson Paddock how to push forward on the simulation of the LDOs

    • How to use cadence to deal with lots of errors (PCB design software)

  • @Kristofer PISTER how about to start design the LDOs?

    • @Kristofer PISTER ask if to make a file for 65nm process?

    • (MRSOP?)

  • @Jackson Paddock are there any pulls and gains for LDOs?

  • @Kristofer PISTER read anything martial about low power from Michigan is a good way to go

  • @Kristofer PISTER