20-Sep-2022

Attendees

  • Yichen Liu

  • @David Burnett

  • Daniel Lovell

  • @Yu-Chi Lin

  • @Alex Moreno

  • @Kristofer PISTER

  • @Austin Patel

Minutes

  • Daniel got ADC working

    • 10th bit known sticking issue. TBD whether it’s an output problem (MSB not being routed correctly?) or input problem (strange issue with SAR state machine timing/control signals?)

    • vbat/4 looks stable, is functional
      External input works
      PTAT does not look so good, seems stuck at 255
      some issues with determining absolute voltage
      There may be some offset that needs to be characterized per-chip if we need to know absolute voltage. For situations that just need deltaV, we don't need that calibration.
      offset is different by chip in part because ADC LDO varies per chip
      's setup had a strange short between the LDO and external input
      Typically 5ish LSB variance around samples. Not good but acceptable for the intended applications

    • Next steps are to measure ENOB. Recommend using external clock initially to separate clock jitter error from circuit layout error