Attendees

Minutes

@Mališa Vučinić Introducing @Sara Faour, new PhD student working on SCuM
- Get SCuM working over a wide range of temperatures then introduce security aspects
- @Kristofer PISTER suggests testing over a huge temperature range to demonstrate successful operation outside of usual crystal temperature ranges
- 256 kB SRAM available in new 16 nm class-developed SoC. January starting again with RISC-V, better LDOs, ADC
@David Burnett cf email to scum mailing list Nov 2, early promising results in firmware workaround to VDDD Tap necessities.
- Results replicated by @Fil Maksimovic, calibration routine still needs to be worked out
@Daniel Lovell
- SCuM-V (2022) specs:
  Single Rocket Core
  5-stage in-order processor supporting RV32IMAC RISC-V instruction set
  200 MHz CPU clock
  32 MHz ADC/RTC clock for radio
  On-chip SRAM
  256kB scratchpad (“L2”)
  8kB 2 way I$ & D$
  JTAG, UART, QPSI Flash
  Interrupt controller
  PLIC (platform level)
  CLINT (core level)
  RTC capture and compare
- Will share spec document and final presentation: Mixed-Chip Final Design Review.pdf
@Thomas Watteyne target dates week of Sept 11 for SCuM conference
- Worked on “Happy Serial,” a library to help with the serial port on the programmer. Available in OpenWSN github repo.